Keynote Lectures

Koike RUMS – a new business scheme to accelerate innovation through integration of front-end and back-end of semiconductor technologies
Atsuyoshi Koike, Ph.D.

President & CEO, Rapidus Corporation



Abstract:
The age of AI has come. To cope with the enormous rate of increase in the demand for computational power for AI chips, it is evident that not only the most advanced, leading-edge semiconductor technology is required, but also tailor-made chips that can efficiently perform specific calculations necessary for AI systems should be delivered. This trend has caused a paradigm shift in design and manufacturing methodology along with the movement from general-purpose CPUs to more specialized AI chips designed for specific uses.

This imminent need for the chips specialized for AI workloads shows another aspect of the issues we need to address, that is the prolonged total cycle time from design, manufacturing to final test of the packaged products when advanced nodes of semiconductors are applied. Furthermore, the trend from general-purpose to specialization naturally leads to the significant increase in the number of designs in the same time period. We definitely need to reduce the total cycle time for AI chips to make this huge market opportunities happen as a real business.

RUMS, standing for “Rapid and Unified Manufacturing Service” is a new business scheme we advocate for the solution to the issues mentioned above, where front-end and back-end semiconductor technologies are integrated in the same fabrication space to maximize the speed for identifying a tailored design solution for the customer’s specific needs. As a result, we believe RUMS will be more favored in the age of AI than the fabless-foundry model that currently dominates in the semiconductor industry.

In this presentation, we discuss the opportunities brought about by RUMS and how international collaboration is critical for its implementation, as well as the progress of the preparation for RUMS at Rapidus Corporation.



Koike Glass packaging for Emerging Applications in Advanced Communications and AI
Madhavan Swaminathan

The Pennsylvania State University



Abstract:
Over the last decade semiconductor packaging has made tremendous progress with the introduction of the silicon interposer, embedded silicon bridge, wafer level fanout, organic packaging, and others. These solutions support high density wiring in the package with methods for robust power delivery and thermal management solutions. With the emergence of Heterogeneous Integration and emerging applications driven by a confluence of advanced communication and artificial intelligence (AI), there is an opportunity for glass packaging to play a significant role.

But why glass as a core substrate? What are the benefits of glass as compared to other solutions? What is the State of the Art in this area and what are the challenges? What are the possible solutions with this material? These questions will be addressed in this presentation.



Keser Beth The Chiplet Challenge
Beth Keser

Zero ASIC




Abstract:
Recently, multiple application spaces including high performance compute (HPC), autonomous driver-assistance systems (ADAS) and automotive, 5G/6G, internet of things (IoT)/MEMS/sensors require a combination of heterogeneous chiplets to create new competitive and reliable product solutions. These applications, whether driven by performance, form factor, or cost, require packaging solutions where distinctly different chiplets can be integrated into a package or system. This talk will explore the current and future challenges of chiplets and Zero ASIC’s strategy to solve these challenges.