Abstract:
Welcome to Nagano!
Semiconductors are the foundation for supporting and developing the digital society. In the future, the trend towards digitalization is inevitable in all industries,
and large amounts of data processing capabilities will be required.
In recent years, cutting-edge semiconductor technology development sites have continued to evolve the back-end processes, and especially "advanced semiconductor packaging technology" is continuing high integration and responding to the demand for high-performance and multi-functional semiconductor.
According to the recent progress or needs for “Chiplet”, the trend of semiconductor packaging is going toward finer wiring and larger substrates.
I will introduce substrate manufacturing technology and organic interposer technology to achieve compatibility with SI/PI characteristics.
I will also talk about the latest technology trends, including photonics-electronics convergence packages that will be necessary in the near future, focusing on our company's development activities.

Abstract:
As the demand for generative AI and accelerated computing continues to grow, the need for efficient and reliable data center cooling solutions has never been more critical. Traditional cooling designs struggle to keep pace with the increasing power densities and energy demands of modern accelerated compute data center infrastructures. In this talk, we will explore the revolutionary role of digital twins in the design, operation, and optimization of data center cooling systems. By creating virtual replicas of physical data centers, digital twins enable predictive modeling, real-time monitoring, and scenario testing, offering a smarter approach to managing thermal performance and energy efficiency.

Central to this innovation is the use of tools such as NVIDIA Omniverse and Modulus, which facilitate the creation and simulation of digital twins with unprecedented precision. These platforms allow for seamless integration of real-time data, advanced physics modeling, and machine learning, making it possible to simulate various cooling strategies, predict future challenges, and optimize configurations. By partnering with industry leaders like Cadence, Vertiv, and Schneider Electric, we are delivering comprehensive digital twin solutions tailored to address the complex cooling requirements of generative AI workloads. These collaborations bring together expertise in hardware, software, and engineering to create more efficient, flexible, and scalable cooling systems.

This presentation will also showcase real-world case studies demonstrating how digital twins, powered by NVIDIA Omniverse and Modulus, have been successfully deployed to tackle the challenges of cooling for generative AI and accelerated compute data centers. Attendees will gain insights into best practices, key technologies, and the future potential of digital twins in driving smarter, more sustainable data center operations. As generative AI and accelerated compute workloads continues to evolve, digital twin technology—backed by strategic industry partnerships—will be at the forefront of innovation, enabling data centers to adapt to changing demands with precision and agility.

Abstract:
In this presentation, we will explore the innovative role of chiplet technology in the semiconductor industry and its potential for the future. By surpassing the limitations of traditional monolithic chip design and combining different process technologies and functionalities, chiplet technology enables performance enhancement, cost optimization, and design flexibility, driving a paradigm shift in semiconductor design. We will explain how this technology is transforming the semiconductor industry and its impact on next-generation devices, as well as discuss its future applications and possibilities.

Abstract:
In supporting the continuous evolution of AI and high-speed networks, the back-end process of semiconductors is becoming increasingly important from the perspective of improving device performance and ensuring reliability. In this lecture, speaker will focus on FC-BGA substrates that constitute the chip-let structures adopted in applications known as HPC, and discuss recent technological trends and future prospects.

Abstract:
Recent advances in electronics packaging have come to the rescue as CMOS scaling has stalled making possible the incredible advances in AI/ML and many other fields, that promise to transform our lives. This journey, however, has only just begun and much more is yet to come. The key features that will drive this transformation can be described with the simple strategy of “scale-down and scale-out” that has characterized monolithic CMOS scaling for several decades, the drive to chiplets with higher yields, and the ability to assemble a diversity of technologies on the same substrate allowing us to blur the lines between monolithic chip and a large heterogeneous assembly of chips. In this talk we will describe our approach to simplify packaging at all levels: from design, architecture, process and manufacturing that have the potential to take packaging to the next level including the ability to scale packaging systematically. If time permits we will also address the issue of global cooperation to ensure a stable, resilient and secure supply chain and a global workforce.